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FEATURES High Dynamic Range Output IP3: +28 dBm: Re 50 @ 250 MHz Low Noise Figure: 5.9 dB @ 250 MHz Two Gain Versions: AD8350-15: 15 dB AD8350-20: 20 dB -3 dB Bandwidth: 1.0 GHz Single Supply Operation: 5 V to 10 V Supply Current: 28 mA Input/Output Impedance: 200 Single-Ended or Differential Input Drive 8-Lead SOIC Package and 8-Lead microSOIC Package APPLICATIONS Cellular Base Stations Communications Receivers RF/IF Gain Block Differential A-to-D Driver SAW Filter Interface Single-Ended-to-Differential Conversion High Performance Video High Speed Data Transmission PRODUCT DESCRIPTION
Low Distortion 1.0 GHz Differential Amplifier AD8350
FUNCTIONAL BLOCK DIAGRAM 8-Lead SOIC and SOIC Packages (with Enable)
IN+ 1 ENBL 2 8 IN- GND GND OUT-
+
-
7 6 5
VCC 3 OUT+ 4
AD8350
The AD8350 series are high performance fully-differential amplifiers useful in RF and IF circuits up to 1000 MHz. The amplifier has excellent noise figure of 5.9 dB at 250 MHz. It offers a high output third order intercept (OIP3) of +28 dBm at 250 MHz. Gain versions of 15 dB and 20 dB are offered. The AD8350 is designed to meet the demanding performance requirements of communications transceiver applications. It enables a high dynamic range differential signal chain, with exceptional linearity and increased common-mode rejection. The device can be used as a general purpose gain block, an A-to-D driver, and high speed data interface driver, among other functions. The AD8350 input can also be used as a singleended-to-differential converter.
The amplifier can be operated down to 5 V with an OIP3 of +28 dBm at 250 MHz and slightly reduced distortion performance. The wide bandwidth, high dynamic range and temperature stability make this product ideal for the various RF and IF frequencies required in cellular, CATV, broadband, instrumentation and other applications. The AD8350 is offered in an 8-lead single SOIC package and SOIC package. It operates from 5 V and 10 V power supplies, drawing 28 mA typical. The AD8350 offers a power enable function for power-sensitive applications. The AD8350 is fabricated using Analog Devices' proprietary high speed complementary bipolar process. The device is available in the industrial (-40C to +85C) temperature range.
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2001
AD8350-SPECIFICATIONS differential inputs and differential outputs unless noted.)
Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time Gain (S21)1 Gain Supply Sensitivity Gain Temperature Sensitivity Isolation (S12)1 NOISE/HARMONIC PERFORMANCE 50 MHz Signal Second Harmonic Third Harmonic Output Second Order Intercept2 Output Third Order Intercept2 250 MHz Signal Second Harmonic Third Harmonic Output Second Order Intercept2 Output Third Order Intercept2 1 dB Compression Point (RTI)2 Voltage Noise (RTI) Noise Figure INPUT/OUTPUT CHARACTERISTICS Differential Offset Voltage (RTI) Differential Offset Drift Input Bias Current Input Resistance CMRR Output Resistance POWER SUPPLY Operating Range Quiescent Current Conditions VS = 5 V, VOUT = 1 V p-p VS = 10 V, VOUT = 1 V p-p VS = 5 V, VOUT = 1 V p-p VS = 10 V, VOUT = 1 V p-p VOUT = 1 V p-p 0.1%, VOUT = 1 V p-p VS = 5 V, f = 50 MHz VS = 5 V to 10 V, f = 50 MHz TMIN to TMAX f = 50 MHz Min
(@ 25 C, VS = 5 V, G = 15 dB, unless otherwise noted. All specifications refer to
Typ 0.9 1.1 90 90 2000 10 15 0.003 -0.002 -18 Max Unit GHz GHz MHz MHz V/s ns dB dB/V dB/C dB
14
16
VS = 5 V, VOUT = 1 V p-p VS = 10 V, VOUT = 1 V p-p VS = 5 V, VOUT = 1 V p-p VS = 10 V, VOUT = 1 V p-p VS = 5 V VS = 10 V VS = 5 V VS = 10 V VS = 5 V, VOUT = 1 V p-p VS = 10 V, VOUT = 1 V p-p VS = 5 V, VOUT = 1 V p-p VS = 10 V, VOUT = 1 V p-p VS = 5 V VS = 10 V VS = 5 V VS = 10 V VS = 5 V VS = 10 V f = 150 MHz f = 150 MHz VOUT+ - VOUT- TMIN to TMAX Real f = 50 MHz Real 4 25 3 27 3
-66 -67 -65 -70 58 58 28 29 -48 -49 -52 -61 39 40 24 28 2 5 1.7 6.8 1 0.02 15 200 -67 200 11.0 32 5.5 34 6.5
dBc dBc dBc dBc dBm dBm dBm dBm dBc dBc dBc dBc dBm dBm dBm dBm dBm dBm nV/Hz dB mV mV/C A dB V mA mA mA mA ns dB C
Powered Up, VS = 5 V Powered Down, VS = 5 V Powered Up, VS = 10 V Powered Down, VS = 10 V f = 50 MHz, VS = 1 V p-p
Power-Up/Down Switching Power Supply Rejection Ratio OPERATING TEMPERATURE RANGE
NOTES 1 See Tables II-III for complete list of S-Parameters. 2 Re: 50 . Specifications subject to change without notice.
28 3.8 30 4 15 -58
-40
+85
-2-
REV. A
AD8350
differential inputs and differential outputs unless noted.)
Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time Gain (S21)1 Gain Supply Sensitivity Gain Temperature Sensitivity Isolation (S12)1 NOISE/HARMONIC PERFORMANCE 50 MHz Signal Second Harmonic Third Harmonic Output Second Order Intercept2 Output Third Order Intercept2 250 MHz Signal Second Harmonic Third Harmonic Output Second Order Intercept2 Output Third Order Intercept2 1 dB Compression Point (RTI)2 Voltage Noise (RTI) Noise Figure INPUT/OUTPUT CHARACTERISTICS Differential Offset Voltage (RTI) Differential Offset Drift Input Bias Current Input Resistance CMRR Output Resistance POWER SUPPLY Operating Range Quiescent Current
AD8350-20-SPECIFICATIONS (@ 25 C, V = 5 V, G = 20 dB, unless otherwise noted. All specifications refer to
S
Conditions VS = 5 V, VOUT = 1 V p-p VS = 10 V, VOUT = 1 V p-p VS = 5 V, VOUT = 1 V p-p VS = 10 V, VOUT = 1 V p-p VOUT = 1 V p-p 0.1%, VOUT = 1 V p-p VS = 5 V, f = 50 MHz VS = 5 V to 10 V, f = 50 MHz TMIN to TMAX f = 50 MHz
Min
Typ 0.7 0.9 90 90 2000 15 20 0.003 -0.002 -22
Max
Unit GHz GHz MHz MHz V/s ns dB dB/V dB/C dB
19
21
VS = 5 V, VOUT = 1 V p-p VS = 10 V, VOUT = 1 V p-p VS = 5 V, VOUT = 1 V p-p VS = 10 V, VOUT = 1 V p-p VS = 5 V VS = 10 V VS = 5 V VS = 10 V VS = 5 V, VOUT = 1 V p-p VS = 10 V, VOUT = 1 V p-p VS = 5 V, VOUT = 1 V p-p VS = 10 V, VOUT = 1 V p-p VS = 5 V VS = 10 V VS = 5 V VS = 10 V VS = 5 V VS = 10 V f = 150 MHz f = 150 MHz VOUT+ - VOUT- TMIN to TMAX Real f = 50 MHz Real 4 25 3 27 3
-65 -66 -66 -70 56 56 28 29 -45 -46 -55 -60 37 38 24 28 -2.6 1.8 1.7 5.6 1 0.02 15 200 -52 200 11.0 32 5.5 34 6.5
dBc dBc dBc dBc dBm dBm dBm dBm dBc dBc dBc dBc dBm dBm dBm dBm dBm dBm nV/Hz dB mV mV/C A dB V mA mA mA mA ns dB C
Powered Up, VS = 5 V Powered Down, VS = 5 V Powered Up, VS = 10 V Powered Down, VS = 10 V f = 50 MHz, VS = 1 V p-p
Power-Up/Down Switching Power Supply Rejection Ratio OPERATING TEMPERATURE RANGE
NOTES 1 See Tables II-III for complete list of S-Parameters. 2 Re: 50 .
28 3.8 30 4 15 -45
-40
+85
REV. A
-3-
AD8350
ABSOLUTE MAXIMUM RATINGS* PIN FUNCTION DESCRIPTIONS
Supply Voltage, VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 V Input Power Differential . . . . . . . . . . . . . . . . . . . . . . +8 dBm Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . 400 mW JA SOIC (R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100C/W JA SOIC (RM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133C/W Maximum Junction Temperature . . . . . . . . . . . . . . . . . 125C Operating Temperature Range . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . -65C to +150C Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300C
*Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Pin 1, 8
Function IN+, IN-
Description Differential Inputs. IN+ and IN- should be ac-coupled (pins have a dc bias of midsupply). Differential input impedance is 200 . Power-up Pin. A high level (5 V) enables the device; a low level (0 V) puts device in sleep mode. Positive Supply Voltage. 5 V to 10 V. Differential Outputs. OUT+ and OUT- should be ac-coupled (pins have a dc bias of midsupply). Differential input impedance is 200 . Common External Ground Reference.
2
ENBL
3 4, 5
VCC OUT+, OUT-
PIN CONFIGURATION
IN+ 1 ENBL 2
8
6, 7
GND
IN-
GND TOP VIEW VCC 3 (Not to Scale) 6 GND
7 5
AD8350
OUT+ 4
OUT-
ORDERING GUIDE
Model AD8350AR15 AD8350AR15-REEL AD8350AR15-REEL7 AD8350ARM15 AD8350ARM15-REEL AD8350ARM15-REEL7 AD8350AR20 AD8350AR20-REEL AD8350AR20-REEL7 AD8350ARM20 AD8350ARM20-REEL AD8350ARM20-REEL7 AD8350-EVAL
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Description 8-Lead SOIC 8-Lead SOIC 13" Reel 8-Lead SOIC 7" Reel 8-Lead microSOIC 8-Lead microSOIC 13" Reel 8-Lead microSOIC 7" Reel 8-Lead SOIC 8-Lead SOIC 13" Reel 8-Lead SOIC 7" Reel 8-Lead microSOIC 8-Lead microSOIC 13" Reel 8-Lead microSOIC 7" Reel SOIC Evaluation Board
Package Option SO-8 SO-8 SO-8 RM-8 RM-8 RM-8 SO-8 SO-8 SO-8 RM-8 RM-8 RM-8
Brand Code Standard Standard Standard J2N J2N J2N Standard Standard Standard J2P J2P J2P
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8350 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
-4-
REV. A
Typical Performance Characteristics-AD8350
50
20
25 VCC = 10V
SUPPLY CURRENT - mA
40 VCC = 10V
15
GAIN - dB
VCC = 10V
GAIN - dB
20 VCC = 5V 15
30 VCC = 5V 20
10
5
10
10 VCC = 5V
0 -40
-20
0 20 40 TEMPERATURE - C
0
60 80
1
10
100 1k FREQUENCY - MHz
10k
5
1
10
100 1k FREQUENCY - MHz
10k
TPC 1. Supply Current vs. Temperature
TPC 2. AD8350-15 Gain (S21) vs. Frequency
TPC 3. AD8350-20 Gain (S21) vs. Frequency
350
350
500
300
300
400
SOIC
IMPEDANCE -
IMPEDANCE -
IMPEDANCE -
250
VCC = 10V
250
VCC = 10V
300
SOIC
200 VCC = 5V 150
200
200
150
VCC = 5V
100
100 1 10 100 FREQUENCY - MHz 1k
100 1 10 100 FREQUENCY - MHz 1k
0
0
10 100 FREQUENCY - MHz
1000
TPC 4. AD8350-15 Input Impedance vs. Frequency
TPC 5. AD8350-20 Input Impedance vs. Frequency
TPC 6. AD8350-15 Output Impedance vs. Frequency
800 SOIC 600
-5
-10
-10
-15
ISOLATION - dB
IMPEDANCE -
ISOLATION - dB
VCC = 10V -20
400
SOIC
-15
VCC = 10V
200
-20
VCC = 5V
-25
VCC = 5V
0
0
100 10 FREQUENCY - MHz
1000
-25 1 10 100 1k FREQUENCY - MHz 10k
-30
1
10
100 1k FREQUENCY - MHz
10k
TPC 7. AD8350-20 Output Impedance vs. Frequency
TPC 8. AD8350-15 Isolation (S12) vs. Frequency
TPC 9. AD8350-20 Isolation (S12) vs. Frequency
REV. A
-5-
AD8350
-40 VOUT = 1V p-p -45 -50 -55 -60 -65 HD3 (VCC = 10V) -70 -75 -80 0 HD3 (VCC = 5V) HD2 (VCC = 10V)
DISTORTION - dBc
-40 VOUT = 1V p-p -45 -50 HD2 (VCC = 10V) -55 -60 -65 -70 -75 -80 HD3 (VCC = 5V) HD3 (VCC = 10V) HD2 (VCC = 5V)
DISTORTION - dBc
-45
FO = 50MHz HD3 (VCC = 5V)
DISTORTION - dBc
HD2 (VCC = 5V)
-55
HD2 (VCC = 5V)
-65 HD2 (VCC = 10V) -75 HD3 (VCC = 10V)
-85
0 50 100 150 200 250 300 FUNDAMENTAL FREQUENCY - MHz
50 100 150 200 250 300 FUNDAMENTAL FREQUENCY - MHz
0
0.5
1 1.5 2 2.5 3 OUTPUT VOLTAGE - V p-p
3.5
TPC 10. AD8350-15 Harmonic Distortion vs. Frequency
TPC 11. AD8350-20 Harmonic Distortion vs. Frequency
TPC 12. AD8350-15 Harmonic Distortion vs. Differential Output Voltage
-45
FO = 50MHz
66
HD2 (VCC = 5V)
66 61
HD3 (VCC = 5V)
OIP2 - dBm (Re: 50 )
61
OIP2 - dBm (Re: 50 )
DISTORTION - dBc
-55
56
VCC = 10V
56
VCC = 10V
-65
51 VCC = 5V
51 VCC = 5V
HD2 (VCC = 10V) HD3 (VCC = 10V)
46
46
-75
41
41
-85
0
0.5
1 1.5 2 2.5 3 OUTPUT VOLTAGE - V p-p
3.5
36
0
50
100 150 200 FREQUENCY - MHz
250
300
36
0
50
100 150 200 FREQUENCY - MHz
250
300
TPC 13. AD8350-20 Harmonic Distortion vs. Differential Output Voltage
TPC 14. AD8350-15 Output Referred IP2 vs. Frequency
TPC 15. AD8350-20 Output Referred IP2 vs. Frequency
41 36
41 36 VCC = 10V
10.0
1dB COMPRESSION - dBm (Re: 50 )
INPUT REFERRED VCC = 10V
7.5
OIP3 - dBm (Re: 50 )
OIP3 - dBm (Re: 50 )
VCC = 10V 31
31
5.0 2.5
26 VCC = 5V
26
21
21
VCC = 5V
0
VCC = 5V
16
16
-2.5
11
0
50
100 150 200 FREQUENCY - MHz
250
300
11
0
50
100 150 200 FREQUENCY - MHz
250
300
-5.0
0
100
200 300 400 FREQUENCY - MHz
500
600
TPC 16. AD8350-15 Output Referred IP3 vs. Frequency
TPC 17. AD8350-20 Output Referred IP3 vs. Frequency
TPC 18. AD8350-15 1 dB Compression vs. Frequency
-6-
REV. A
AD8350
7.5
1dB COMPRESSION - dBm (Re: 50 )
10
10
INPUT REFERRED 5.0
NOISE FIGURE - dB
9
9
2.5 0
VCC = 10V
8
NOISE FIGURE - dB
VCC = 10V
8 VCC = 10V
7 VCC = 5V 6
7
-2.5 VCC = 5V
-5.0 -7.5
6
VCC = 5V
0
5
100
200 300 400 FREQUENCY - MHz
500
600
0
50 100 150 200 250 300 350 400 450 500 FREQUENCY - MHz
5
0
50 100 150 200 250 300 350 400 450 500 FREQUENCY - MHz
TPC 19. AD8350-20 1 dB Compression vs. Frequency
TPC 20. AD8350-15 Noise Figure vs. Frequency
TPC 21. AD8350-20 Noise Figure vs. Frequency
25 20
AD8350-20
100 50 VOUT + (VCC = 5V)
-20 VCC = 5V -30 -40
OUTPUT OFFSET - mV
15 10 GAIN - dB 5 0 -5 -10 -15 -20 1 2 3 4 5 6 7 VCC - Volts 8 9 10 AD8350-15
0 -50 -100 -150 -200 -250 -40 VOUT - (VCC = 10V) VOUT - (VCC = 5V)
PSRR - dB
-50 -60 -70 -80 -90
AD8350-20
VOUT + (VCC = 10V)
AD8350-15
-20
0 20 40 TEMPERATURE - C
60
80
1
10 100 FREQUENCY - MHz
1k
TPC 22. AD8350 Gain (S21) vs. Supply Voltage
TPC 23. AD8350 Output Offset Voltage vs. Temperature
TPC 24. AD8350 PSRR vs. Frequency
-20 -30
VCC = 5V AD8350-20
500mV
VCC = 5V
-40
VOUT
PSRR - dB
-50 -60 -70 -80
5V
AD8350-15
ENBL
-90 1 10 100 FREQUENCY - MHz 1k
30ns
TPC 25. AD8350 CMRR vs. Frequency
TPC 26. AD8350 Power-Up/Down Response Time
REV. A
-7-
AD8350
APPLICATIONS Using the AD8350
L S /2 CAC CAC L S /2
Figure 1 shows the basic connections for operating the AD8350. A single supply in the range 5 V to 10 V is required. The power supply pin should be decoupled using a 0.1 F capacitor. The ENBL pin is tied to the positive supply or to 5 V (when VCC = 10 V) for normal operation and should be pulled to ground to put the device in sleep mode. Both the inputs and the outputs have dc bias levels at midsupply and should be ac-coupled. Also shown in Figure 1 are the impedance balancing requirements, either resistive or reactive, of the input and output. With an input and output impedance of 200 , the AD8350 should be driven by a 200 source and loaded by a 200 impedance. A reactive match can also be implemented.
SOURCE Z = 100 8 7 6 5 C2 0.001 F C4 0.001 F LOAD
8 R S /2 CP
7
6
5
AD8350
-
CP RLOAD
VS
R S /2 1 L S /2 2 3 4 L S /2
CAC ENBL (5V) +VS (5V TO 10V)
+
CAC 0.1 F
Figure 3. Reactively Matching the Input and Output
CAC CAC
LS
LS
AD8350
-
+
Z = 200
RS CP
8
7
6
5
AD8350
-
+
CP RLOAD
VS
3 4
1 Z = 100
2
1
C1 0.001 F ENBL (5V) C5 0.1 F +VS (5V TO 10V) C3 0.001 F
2
3
4 CAC 0.1 F
CAC ENBL (5V) +VS (5V TO 10V)
Figure 1. Basic Connections for Differential Drive
Figure 2 shows how the AD8350 can be driven by a singleended source. The unused input should be ac-coupled to ground. When driven single-endedly, there will be a slight imbalance in the differential output voltages. This will cause an increase in the second order harmonic distortion (at 50 MHz, with VCC = 10 V and VOUT = 1 V p-p, -59 dBc was measured for the second harmonic on AD8350-15).
LOAD C2 0.001 F 8 7 6 5 C4 0.001 F
Figure 4. Single-Ended Equivalent Circuit
AD8350
-
Z = 200
When the source impedance is smaller than the load impedance, a step-up matching network is required. A typical step-up network is shown on the input of the AD8350 in Figure 3. For purely resistive source and load impedances the resonant approach may be used. The input and output impedance of the AD8350 can be modeled as a real 200 resistance for operating frequencies less than 100 MHz. For signal frequencies exceeding 100 MHz, classical Smith Chart matching techniques should be invoked in order to deal with the complex impedance relationships. Detailed S parameter data measured differentially in a 200 system can be found in Tables II and III. For the input matching network the source resistance is less than the input resistance of the AD8350. The AD8350 has a nominal 200 input resistance from Pins 1 to 8. The reactance of the ac-coupling capacitors, CAC, should be negligible if 100 nF capacitors are used and the lowest signal frequency is greater than 1 MHz. If the series reactance of the matching network inductor is defined to be XS = 2 f LS, and the shunt reactance of the matching capacitor to be XP = (2 f CP)-1, then:
SOURCE Z = 200 C1 0.001 F
1
+
2 3
4
ENBL (5V)
C3 0.001 F C5 0.1 F +VS (5V TO 10V)
Figure 2. Basic Connections for Single-Ended Drive
Reactive Matching
XS =
RS x RLOAD where X P = RLOAD x XP
RS RLOAD - RS
(1)
In practical applications, the AD8350 will most likely be matched using reactive matching components as shown in Figure 3. Matching components can be calculated using a Smith Chart or by using a resonant approach to determine the matching network that results in a complex conjugate match. In either situation, the circuit can be analyzed as a single-ended equivalent circuit to ease calculations as shown in Figure 4. -8-
For a 70 MHz application with a 50 source resistance, and assuming the input impedance is 200 , or RLOAD = RIN = 200 , then XP = 115.5 and XS = 86.6 , which results in the following component values: CP = (2 x 70 x 106 x 115.5)-1 = 19.7 pF and LS = 86.6 x (2 x 70 x 106)-1 = 197 nH REV. A
AD8350
For the output matching network, if the output source resistance of the AD8350 is greater than the terminating load resistance, a step-down network should be employed as shown on the output of Figure 3. For a step-down matching network, the series and parallel reactances are calculated as: The same results could be found using a Smith Chart as shown in Figure 7. In this example, a shunt capacitor and a series inductor are used to match the 200 source to a 50 load. For a frequency of 10 MHz, the same capacitor and inductor values previously found using the resonant approach will transform the 200 source to match the 50 load. At frequencies exceeding 100 MHz, the S parameters from Tables II and III should be used to account for the complex impedance relationships.
XS =
RS x RLOAD where X P = RS x XP
RLOAD RS - RLOAD
(2)
For a 10 MHz application with the 200 output source resistance of the AD8350, RS = 200 , and a 50 load termination, RLOAD = 50 , then XP = 115.5 and X S = 86.6 , which results in the following component values: CP = (2 x 10 x 106 x 115.5)-1 = 138 pF and LS = 86.6 x (2 x 10 x 106)-1 = 1.38 H The same results can be obtained using the plots in Figure 5 and Figure 6. Figure 5 shows the normalized shunt reactance versus the normalized source resistance for a step-up matching network, RS < RLOAD. By inspection, the appropriate reactance can be found for a given value of RS/RLOAD. The series reactance is then calculated using XS = RS RLOAD/XP. The same technique can be used to design the step-down matching network using Figure 6.
2
NORMALIZED REACTANCE - XP /RLOAD
LOAD SOURCE
SHUNT C SERIES L
1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2
RSOURCE XS XP RLOAD
Figure 7. Smith Chart Representation of Step-Down Network
After determining the matching network for the single-ended equivalent circuit, the matching elements need to be applied in a differential manner. The series reactance needs to be split such that the final network is balanced. In the previous examples, this simply translates to splitting the series inductor into two equal halves as shown in Figure 3.
Gain Adjustment
Figure 5. Normalized Step-Up Matching Components
3.2 RSOURCE
NORMALIZED REACTANCE - XP/RLOAD
3 XP 2.8
2.6
2.4
2.2
2
4
6
2.4
2.8
3.2
3.6
4.4
4.8
5.2
5.6
6.4
6.8
7.2
7.6
8
8.4
NORMALIZED SOURCE RESISTANCE - RSOURCE/R LOAD
Figure 6. Normalized Step-Down Matching Components
REV. A
8.8
2
0.01 0.05 0.09 0.13 0.17 0.21 0.25 0.29 0.33 0.37 0.41 0.45 0.49 0.53 0.57 0.61 0.65 0.69 0.73 0.77
0
NORMALIZED SOURCE RESISTANCE - RSOURCE /R LOAD
XS RLOAD
The effective gain of the AD8350 can be reduced using a number of techniques. Obviously a matched attenuator network will reduce the effective gain, but this requires the addition of a separate component which can be prohibitive in size and cost. The attenuator will also increase the effective noise figure resulting in an SNR degradation. A simple voltage divider can be implemented using the combination of the driving impedance of the previous stage and a shunt resistor across the inputs of the AD8350 as shown in Figure 8. This provides a compact solution but suffers from an increased noise spectral density at the input of the AD8350 due to the thermal noise contribution of the shunt resistor. The input impedance can be dynamically altered through the use of feedback resistors as shown in Figure 9. This will result in a similar attenuation of the input signal by virtue of the voltage divider established from the driving source impedance and the reduced input impedance of the AD8350. Yet this technique does not significantly degrade the SNR with the unnecessary increase in thermal noise that arises from a truly resistive attenuator network.
-9-
AD8350
CAC CAC RS 8 RSHUNT 7 6 5 RL
AD8350
-
+
VS RS
RSHUNT 1 CAC 0.1 F ENBL (5V) +VS (5V TO 10V) 2 3 4 CAC
RL
The insertion loss and the resultant power gain for multiple shunt resistor values is summarized in Table I. The source resistance and input impedance need careful attention when using Equation 1. The reactance of the input impedance of the AD8350 and the ac-coupling capacitors need to be considered before assuming they have negligible contribution. Figure 10 shows the effective power gain for multiple values of RSHUNT for the AD8350-15 and AD8350-20.
Table I. Gain Adjustment Using Shunt Resistor, RS = 100 and RIN = 100 Single-Ended
RSHUNT- 50 100 200 300 400
20 18 16 14
IL-dB 6.02 3.52 1.94 1.34 1.02
Power Gain-dB AD8350-15 AD8350-20 8.98 11.48 13.06 13.66 13.98 13.98 16.48 18.06 18.66 18.98
Figure 8. Gain Reduction Using Shunt Resistor
RFEXT CAC CAC
RS
8
7
6
5
AD8350
-
+
RL
VS RS 1 CAC
AD8350-20
RL 2 3 4 CAC
GAIN - dB
12 AD8350-15 10 8 6 4
ENBL (5V) +VS (5V TO 10V) RFEXT
0.1 F
2 0 0 100 200 300 400 RSHUNT - 500 600 700 800
Figure 9. Dynamic Gain Reduction
Figure 8 shows a typical implementation of the shunt divider concept. The reduced input impedance that results from the parallel combination of the shunt resistor and the input impedance of the AD8350 adds attenuation to the input signal effectively reducing the gain. For frequencies less than 100 MHz, the input impedance of the AD8350 can be modeled as a real 200 resistance (differential). Assuming the frequency is low enough to ignore the shunt reactance of the input, and high enough such that the reactance of moderately sized ac-coupling capacitors can be considered negligible, the insertion loss, IL, due to the shunt divider can be expressed as:
RIN ( RIN + RS ) IL ( dB ) = 20 x Log10 RIN RSHUNT ( RIN RSHUNT + RS ) where RIN RSHUNT R x RSHUNT and RIN = 100 single - ended = IN RIN + RSHUNT
Figure 10. Gain for Multiple Values of Shunt Resistance for Circuit in Figure 8
The gain can be adjusted dynamically by employing external feedback resistors as shown in Figure 9. The effective attenuation is a result of the lowered input impedance as with the shunt resistor method, yet there is no additional noise contribution at the input of the device. It is necessary to use well-matched resistors to minimize common-mode offset errors. Quality 1% tolerance resistors should be used along with a symmetric board layout to help guarantee balanced performance. The effective gain for multiple values of external feedback resistors is shown in Figure 11.
(3)
-10-
REV. A
AD8350
20 18 AD8350-20 16 14
Driving Lighter Loads
GAIN - dB
12 10 8 6 4 2 0 0 500 1000 RFEXT - 1500 2000 AD8350-15
It is not necessary to load the output of the AD8350 with a 200 differential load. Often it is desirable to try to achieve a complex conjugate match between the source and load in order to minimize reflections and conserve power. But if the AD8350 is driving a voltage responding device, such as an ADC, it is no longer necessary to maximize power transfer. The harmonic distortion performance will actually improve when driving loads greater than 200 . The lighter load requires less current driving capability on the output stages of the AD8350 resulting in improved linearity. Figure 12 shows the improvement in second and third harmonic distortion for increasing differential load resistance.
-66 -68 -70
DISTORTION - dBc
Figure 11. Power Gain vs. External Feedback Resistors for the AD8350-15 and AD8350-20 with R S = 100 and RL = 100
HD3 -72 -74 -76 -78
The power gain of any two-port network is dependent on the source and load impedance. The effective gain will change if the differential source and load impedance is not 200 . The singleended input and output resistance of the AD8350 can be modeled using the following equations:
RIN
RF + RL = RF + RL + 1 + gm x RL RINT
HD2 -80
(4)
-82 200
300
400
500
600 RLOAD -
700
800
900
1000
and
1 1 1 + RS RINT = 1 1 + gm x 1 1 + RS RINT RF +
Figure 12. Second and Third Harmonic Distortion vs. Differential Load Resistance for the AD8350-15 with VS = 5 V, f = 70 MHz, and VOUT = 1 V p-p
RF + RS for RS 1 k 1 + gm x RS
ROUT

(5)
where = RFEXT//RFINT RF R FEXT = R Feedback External RFINT = 662 for the AD8350-15 = 1100 for the AD8350-20 RINT = 25000 gm = 0.066 mhos for the AD8350-15 = 0.110 mhos for the AD8350-20 = R Source (Single-Ended) RS RL = R Load (Single-Ended) = R Input (Single-Ended) R IN R OUT = R Output (Single-Ended) The resultant single-ended gain can be calculated using the following equation:
GV = RL x ( gm x RF - 1)
RL + RS + RF + RL x RS x gm
(6)
REV. A
-11-
AD8350
EVALUATION BOARD
Figure 13 shows the schematic of the AD8350 evaluation board, for SOIC, as it is shipped from the factory. The board is configured to allow easy evaluation using single-ended 50 test equipment. The input and output transformers have a 4-to-1 impedance ratio and transform the AD8350's 200 input and output impedances to 50 . In this mode, 0 resistors (R1 and R4) are required. To allow compensation for the insertion loss of the transformers, a calibration path is provided at Test In and Test Out. This consists of two transformers connected back to back.
C1 0.001 F
To drive and load the board differentially, transformers T1 and T2 should be removed and replaced with four 0 resistors (0805 size); Resistors R1 and R4 (0 ) should also be removed. This yields a circuit with a broadband input and output impedance of 200 . To match to impedances other than this, matching components (0805 size) can be placed on pads C1, C2, C3, C4, L1, and L2.
C3 0.001 F
R1 0 IN-
T1: TC4-1W (MINI CIRCUITS) 6 1
8 R2 0
7
6
5 R3 0 T2: TC4-1W (MINI CIRCUITS)
AD8350
+
L1 (OPEN)
R4 0 OUT-
-
L2 (OPEN)
1 IN+ 1 2 3 4
6 OUT+
C2 0.001 F +VS A B 3 2 SW1 1 +VS C5 0.1 F
C4 0.001 F
TEST IN
T3: TC4-1W (MINI CIRCUITS) 6 1
T4: TC4-1W (MINI CIRCUITS) TEST OUT
1
6
Figure 13. Evaluation Board
-12-
REV. A
AD8350
Table II. Typical Scattering Parameters for the AD8350-15: V CC = 5 V, Differential Input and Output, Z SOURCE(diff) = 200 ZLOAD(diff) = 200 ,
Frequency - MHz 25 50 75 100 125 150 175 200 225 250 275 300 325 350 375 400 425 450 475 500
S11 0.015-48.8 0.028-65.7 0.043-75.3 0.057-87.5 0.073-91.8 0.080-95.6 0.100-97.4 0.111-99.1 0.128-103.2 0.141-106.7 0.151-109.7 0.161-111.9 0.179-114.7 0.187-117.4 0.194-121 0.199-121.2 0.215-122.6 0.225-127.0 0.225-127.7 0.244-129.9
S12 0.119176.3 0.119171.1 0.119166.9 0.120163.5 0.119159.8 0.120154.8 0.117151.2 0.121147.3 0.120143.7 0.120140.3 0.120136.6 0.123132.9 0.121130.7 0.122126.6 0.123123.6 0.124120.1 0.126117.2 0.126113.9 0.126112 0.128108.1
S21 5.60-4.3 5.61-8.9 5.61-13.5 5.61-17.9 5.65-22.6 5.68-27.0 5.73-31.8 5.78-36.3 5.83-41.0 5.90-45.6 6.02-50.2 6.14-55.1 6.19-60.2 6.27-65.0 6.43-70.1 6.61-75.8 6.77-81.7 6.91-87.6 7.06-93.8 7.27-99.8
S22 0.034-4.8 0.032-14.3 0.036-30.2 0.043-39.6 0.053-40.6 0.058-37 0.072-45.1 0.077-47.7 0.091-52.5 0.104-55.1 0.108-54.2 0.122-51.5 0.135-55.6 0.150-56.9 0.162-60.9 0.187-60.3 0.215-63.3 0.242-63.9 0.268-65.2 0.304-68.2
Table III. Typical Scattering Parameters for the AD8350-20: V CC = 5 V, Differential Input and Output, Z SOURCE(diff) = 200 ZLOAD(diff) = 200
,
Frequency - MHz 25 50 75 100 125 150 175 200 225 250 275 300 325 350 375 400 425 450 475 500
S11 0.017-142.9 0.033-114.9 0.055-110.6 0.073-109.4 0.089-112.1 0.098-116.5 0.124-118.1 0.141-119.4 0.159-122.6 0.170-128.5 0.186-131.6 0.203-132.9 0.215-135.0 0.222-136.9 0.242-142.4 0.240-145.2 0.267-146.7 0.266-150.7 0.267-153.7 0.285-161.1
S12 0.074174.9 0.074171.0 0.075167.0 0.075163.1 0.075159.2 0.076153.8 0.075150.2 0.076147.2 0.077142.2 0.078139.5 0.078135.8 0.080132.5 0.080129.3 0.082125.9 0.082123.6 0.084120.3 0.084117.3 0.086115.1 0.087112.8 0.088110.9
S21 9.96-4.27 9.98-8.9 9.98-13.3 10.00-17.7 10.12-22.1 10.20-26.4 10.34-30.9 10.50-35.6 10.65-40.1 10.80-44.7 11.14-49.3 11.45-54.7 11.70-60.3 11.93-65.0 12.39-70.3 12.99-76.8 13.34-84.0 13.76-90.1 14.34-97.5 14.89-105.0
S22 0.023-16.6 0.022-2.7 0.023-23.5 0.029-22.7 0.037-18.0 0.045-3.2 0.055-15.7 0.065-15.6 0.080-17.7 0.085-22.4 0.096-23.5 0.116-25.9 0.139-29.6 0.161-32.2 0.173-38.6 0.207-37.6 0.241-48.1 0.265-49.7 0.317-53.5 0.359-59.2
REV. A
-13-
AD8350
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic SOIC (SO-8)
0.1968 (5.00) 0.1890 (4.80)
8 5 4
0.1574 (4.00) 0.1497 (3.80) PIN 1
1
0.2440 (6.20) 0.2284 (5.80)
0.0500 (1.27) BSC 0.0098 (0.25) 0.0040 (0.10) SEATING PLANE 0.0688 (1.75) 0.0532 (1.35) 0.0192 (0.49) 0.0138 (0.35) 8 0.0098 (0.25) 0 0.0075 (0.19)
0.0196 (0.50) 0.0099 (0.25)
45
0.0500 (1.27) 0.0160 (0.41)
8-Lead microSOIC Package (RM-8)
0.122 (3.10) 0.114 (2.90)
8
5
0.122 (3.10) 0.114 (2.90)
1 4
0.199 (5.05) 0.187 (4.75)
PIN 1 0.0256 (0.65) BSC 0.120 (3.05) 0.112 (2.84) 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) SEATING 0.008 (0.20) PLANE 0.043 (1.09) 0.037 (0.94) 0.011 (0.28) 0.003 (0.08) 0.120 (3.05) 0.112 (2.84) 33 27
0.028 (0.71) 0.016 (0.41)
-14-
REV. A
-15-
-16-
C01014-1.5-6/01(A)
PRINTED IN U.S.A.

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